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Oracle corp.
Start Date
May, 2013
Completion Date
Aug, 2013

Sun_Oracle_logoI had my summer internship at Oracle corp, where I had my research project about high speed I/O link. Some people still are surprised by the fact that Oracle has its own hardware department. As Oracle acquired Sun Microsystems in 2010, it took over Sun’s server teams to develop engineered server systems for oracle’s software.

Very large-scaled systems like servers require special I/O links between processors and systems.  For example, Oracle SPARC M6-32 server has up to 32 processors with 12 cores each and they are coherently linked.  The better performance processors have, the faster serial links have to be.  On top of that, lower power consumption is an essential constraints to consider.

During the internship, I was in responsible for improving Clock Data Recovery module(CDR), which is to synchronize data from transmitter and clock signal generated by the receiver.  Basically, synchronous systems fetch data along with clock edge. However, clock generator is one of the most power hungry parts in the system as well as power consumption on noise reduction can be significant.  Therefore, transmitter and receiver are equipped with their own clock generators and CDR process becomes necessary.  There are several algorithms available for CDR.  Alexander CDR is one of the most popular one and Muller-Mueller CDR(MM-CDR) is getting more attention in the field due to its minimal sampling rate.  With that trend, more I/O designers think of adopting Pulse Amplitude Modulation(PAM) technique against traditional Non Return to Zero (NRZ) because they can handle more data without pushing I/O to extreme frequency.  However, PAM-X technique involves more complexity in most of I/O modules.

Fig.1 waveform and phase detection in NRZ
Fig.1 waveform and phase detection in NRZ

MM CDR (Phase Detector) was proposed by Muller and Mueller in 1976. (K. Mueller and M. Muller,“Timing Recovery in Digital Synchronous Data Receivers,” IEEE Transactions onCommunications, vol. COM-24, no. 5, pp. 516-531, May 1976. )  To briefly introduce the concept of MM CDR, it detects phase information based on signal polarity and timing differential of error signal.  In NRZ signaling, there are only two possible states and they assigned to be opposite polarity.  That is to say, we can predict the future transition of the signal. If there is no transition, phase detection is not so meaningful and thus the case is considered as “no vote”.  For instance, when the signal is at the bottom state of “-1”, it is not allowed to slide down because there is no legal state.  Once we are aware of possible transition, it is relatively easy to extract phase information by looking at errors of two adjacent states.  To give an example, let say we have positive error at current sampling point with decreasing signal, we are able to notice the signal came too earlier than it is supposed to.  This is described in the figure.1  with yellow arrow.

Fig.2 Possible transitions in PAM-4

Fig.2 Possible transitions in PAM-4

A look-up table of Pseudo NRZ mapping for PAM-4
Table.1 A look-up table of Pseudo NRZ mapping for PAM-4

Then, what is about PAM-X signaling? Technically speaking, NRZ signaling is PAM-2 using one-bit expression.  The number annotated after PAM means how many states are established at a moment.  What we are trying to do is stacking signals more than two such as PAM-3, PAM-4 and so on.  This makes MM CDR difficult because now we have more than two states.  As illustrated below, in case of PAM-4 we have 16 possible transitions including non-interstate transitions. In order to adopt MM CDR scheme without modification, this transitions has to be addressed.

There is a simple solution in digital domain.  By comparing two digitized states (previous & current), the slope of signal can be found.  After performing comparison, we can generate pseudo-NRZ states so that we can map transformed data onto existing MM CDR block. On the left side, I have attached a simple lookup table of the transformation.

In conclusion, generated pseudo bits work well with our incumbent CDR blocks and achieved very good area efficiency with saving extra effort for new CDR implementation. Actual simulation data and environments cannot be revealed at this point. I documented this idea in the form of patent disclosure during my internship at Oracle and submitted to its patent committee for a review and the copry right of this idea belongs to Oracle, Corp.